Samhita Golla

Electrical Engineering, Co-op · University of Alberta · Class of 2028

golla1@ualberta.ca 825-785-4334 linkedin.com/in/samhita-golla Edmonton, AB

I'm Samhita Golla, a third-year Electrical Engineering student at the University of Alberta, driven by a passion for building systems that break down barriers and create real, tangible impact.

I bring a proven track record of managing cross-functional teams, driving on-time delivery, fostering effective collaboration, and proactively mitigating risk. My background spans engineering management and technical development, and I approach complex problems with a creative, solutions-first mindset.

Skills

Design & Tools: KiCad·Altium·AutoCAD·Vivado·LTspice·TraceCalc Pro·Arduino IDE·Raspberry Pi
Programming: VHDL·Python·C / C++·MATLAB·VBA
Data & Office: Excel·Power BI·Power Automate·Word·PowerPoint·Outlook
Working knowledge: Electrical heat trace·Power distribution·Embedded systems·Solar and MPPT·Signal processing·Project management

Education

B.Sc. Electrical Engineering, Co-op

University of Alberta · Edmonton, Alberta

Class of 2028

Five of eight academic terms finished, plus two work terms at Chemelex and PepsiCo Foods Canada.
Coursework worth naming: embedded systems design, discrete-time signals and systems, continuous-time signals and systems.

Experience

Technical Project Management Intern

Chemelex · Edmonton, AB

Jan 2026 — Present

Caught a unit conversion mistake in a $1M change order that had already reached sign-off, worth $400K. Rebuilt the cost sheet in Excel so it couldn't happen again.
Wrote an Excel tool that works out cable cut lengths on its own. Ordering and field install got roughly 30% faster.
Put together 20+ construction and quality work packages: bills of materials, test sheets, AutoCAD markups the crews actually use onsite.
Designed heat trace systems end to end in TraceCalc Pro and AutoCAD: panel board schedules, P&ID isometrics, termination schedules.

TraceCalc ProAutoCADExcel modelling

Supply Chain Leadership Co-op

PepsiCo Foods Canada · Taber, AB

May 2025 — Aug 2025

Closed out product holds covering 50,000+ cases, about $500K of finished goods, coordinating disposal across two sites in four days.
Ran 12-hour production shifts with 40 frontline staff reporting to me, covering scheduling, pace and the odd argument.
Built the daily operations reports and chased down the numbers that looked wrong until I knew why.
Took those findings to senior leadership with a recommendation attached, not just a chart.

Plant operationsRoot cause analysisTeam leadership

Projects

Mission Spacewalker

Stratospheric payload · Electrical member

Mar 2025 — Present

What

Five sensor types logging to one board: dissolved oxygen, PAR, UV, temperature, voltage and current.
Owned the grounding scheme and the power budget for the flight payload.
Ran the integration testing before flight.

KiCad schematic of the payload control board showing voltage regulators, op-amp sensor conditioning, and connector breakouts around the main controller — Control board schematic, KiCad.

Exploded SolidWorks assembly of the payload showing the bioreactor frame, acrylic cylinder, electrical box and gondola integration plate, with a numbered bill of materials — Payload assembly and bill of materials, SolidWorks.

Power distribution block diagram showing a DC-DC converter feeding 5 V to the flight computer, heaters and current sensor, with a 3.3 V rail to the sensors — Power distribution, rail by rail.

How

Stepped the payload's 5 V / 3 A bus down for the sensors, and its unregulated 28 V bus to 24 V through an LM2576 for the heater.
PWM heater control capped at 22% duty, with a mechanical thermostat cutting out at 25 °C.
Sized the harness by current draw and kept power routed clear of signal lines.
Common ground back to the MCU, decoupling caps across 5 V and GND.

Results

Everything ran inside the power budget with margin on each rail.
Room to add sensors later without redoing the power tree.

U of A Solar Car

Ackermann steering geometry, rack and pinion design

Jan 2024 — Present

What

Designed the rack and pinion steering, meeting the competition's turning radius and directional control requirements.
Getting the Ackermann angles right was the core problem. Turning accuracy improved 18% across the iterations.
Also drafted the array and battery schematics, and landed the Maxeon cell sponsorship the build was waiting on.

Ackermann steering geometry diagram showing inner and outer wheel steer angles, wheelbase, track width and the turn centre point M with turning radius Rs — Ackermann geometry. Inner and outer angles resolving on one turn centre.

Illustration of a steering linkage: rack and tie rods connecting to steering arms, with dashed lines from both front wheels meeting at the centre of the turning circle — Rack, tie rods and steering arms driving the angle split.

How

Derived the Ackermann relationship between inner and outer wheel angle from trigonometry, off wheelbase and track width.
Wrote a genetic algorithm optimizer (steering_solver.m) to size the rack, tie rods and steering arms for least departure from ideal geometry.
Checked the results against the physical length constraints, then re-ran the optimization once real parts were chosen.
Static stress analysis across rack, tie rod and steering arm to confirm steering effort stayed in limits.

Results

Steering effort of 82.2 N, under the 150 to 250 N band referenced in UN Regulation No. 79.
Max wheel angles of 28.69° outer and 35.97° inner, hitting the required turning radius with margin.

Electrical Buzzer Piano

ECE 312 · C++ on an ATmega328P

Nov — Dec 2024

What

A polyphonic instrument on an ATmega328P that holds up to three notes at once off keypad input.
4×4 matrix keypad in, with live feedback on an HD44780 LCD and over UART.

KiCad schematic showing an ATmega328P wired to a 4x4 keypad, three piezo buzzers, an HD44780 LCD with contrast potentiometer, a UART module and an ISP snap adapter — Schematic, KiCad. Keypad, three buzzers, LCD and UART off one ATmega328P.

Breadboard build of the instrument: a 4x4 keypad being pressed, three piezo buzzers, the microcontroller board, and an LCD reading Current Notes: G — The build mid note. LCD reads back what is sounding.

How

Three hardware timers in CTC mode, each driving its own piezo buzzer at a separate square wave frequency.
Column driven keypad scanning: cycle each column between pull-up and output low, read the rows, catch single and simultaneous presses.
Debounce logic and deliberate I/O configuration so mechanical switch noise never registered as a note.
LCD and UART running concurrently, notes on the display and streaming to Tera Term.

Results

Correct tones for single and multi-key input, mirrored on both the LCD and the serial terminal.
Pin count is what caps it at one octave. Scoped a follow-up on I2C linked micros or SPI shift registers to widen the range.

Dual-Rail Regulated DC Power Supply

Bridge rectifier, RC filter, Zener regulation

ECE 302

What

Designed, built and tested a dual-rail DC supply delivering ±10 V at 25 mA per rail, inside a 5% regulation and 0.5% ripple spec.
Proved the design out in LTspice before touching a breadboard.

LTspice schematic of the dual-rail supply: a 169.7 V sine source into a coupled transformer, a four-diode 1N4004 bridge rectifier, 100 microfarad filter capacitors, and 350 ohm ballast resistors feeding EDZV10B Zener diodes on the positive and negative rails — LTspice schematic. Bridge rectifier, RC filter and a Zener regulator on each rail.

LTspice transient plot over 50 milliseconds showing the positive rail rising to +10 V and the negative rail falling to -10 V, both flat after about 15 milliseconds — Transient run. Both rails settling to ±10 V.

Oscilloscope on a lab bench displaying two traces, the rectified waveform in yellow and the inverted rail in green, measured on a Keysight InfiniiVision DSO-X 2012A — On the bench, measured against the simulation.

How

Full-wave bridge rectifier to pull both a positive and a negative rail off 120 V AC wall power.
RC low-pass filter on electrolytic capacitors, smoothing the rectified output to roughly ±20 V DC.
Zener regulator on each rail, with the ballast resistor calculated at 350 Ω to hold it at ±10 V.
Chased noise that showed up during regulator testing back to the wiring, and cleared it by shortening the connections.

Results

Regulation of 1.94% on the positive rail and 0% on the negative, against a 5% target.
Ripple of 0.5% and 0.47%, inside spec on both rails.
Held ±10.3 V and ±10.5 V under full load.

Beyond Engineering

Volunteering

Teaching helper, Bridge2ENGG
APEGA
Mustard Seed Food Bank

Off the Clock

Fourteen years of Bharatanatyam
Half marathons
Hiking in the Rockies

Jan – Aug 2027

I'm looking for my next co-op.

Power systems, embedded design, or anything electrical with real hardware at the end of it. Email is the fastest way to reach me.

golla1@ualberta.ca LinkedIn